This invention relates to systems for testing electronic circuits by applying and/or measuring electrical signals and, more particularly, to electronic circuit test systems for applying electrical signals to a device or integrated circuit being tested and measuring the response of the device or integrated circuit to the applied electrical signals. Specifically, the invention is directed to a system for facilitating mechanical and/or electrical connections between an electronic circuit tester and an electronic circuit, such as a device or integrated circuit, being tested so that electrical signals can be transmitted to and/or received from the electronic circuit for characterizing the performance of the electronic circuit. More specifically, one embodiment of the invention provides a docking system for effecting mechanical and/or electrical connections between a fixture board of an electronic circuit tester and a load board and/or a test head of the tester so that electrical signals can be transmitted to and/or received from the electronic circuit for characterizing the performance of the electronic circuit. The docking system in accordance with one embodiment of the invention is particularly adaptable to a high-frequency electronic circuit tester for effecting mechanical and electrical connections between the fixture board and the load board and/or test head of the tester to improve the reliability and repeatability of connections.
Programmable electronic circuit testers are typically used during the manufacture of electronic devices and integrated circuits to test the performance of the device or integrated circuit being manufactured. Tests are conducted to assure that the device or integrated circuit satisfies associated design performance specifications. In order to test the device or integrated circuit, the electronic circuit tester is programmed to inject an electrical signal or suite of electrical signals into the device or integrated circuit under test and to measure the response(s). The electronic circuit tester cannot only be used to test finished packaged devices and integrated circuits, but is also frequently used to perform tests at various stages of the manufacture of the device or integrated circuit between initial wafer processing and final packaging.
A conventional programmable electronic circuit tester, generally indicated by the numeral 10, is shown in FIG. 1. The electronic circuit tester 10 comprises a test head 12 electrically connected by cables routed through a conduit 14 to a rack(s) 16 of electronic test and measurement instruments, such as ac and dc electrical signal generators for applying electrical signals to a device or integrated circuit interfaced to the test head, and signal analyzers, for example, a network analyzer, spectrum analyzer, oscilloscope, or other waveform digitizing and/or signal processing equipment, for measuring the response(s) to those applied electrical signals. The test head 12 can include circuitry which performs distribution of electrical signals, signal separation, frequency translation, amplification, attenuation, switching, or other conditioning or modification of electrical signals prior to being routed to the rack 16 or to a device or integrated circuit being tested.
As shown in FIG. 1, the test head 12 interfaces to a device or integrated circuit through a load board 18 and in turn through a fixture board 20 typically mounted to the test head. Alternatively, prior to installation of the fixture board 20, a calibration board (not shown) having a configuration similar to the fixture board can be connected to the test head 12 for calibrating the test head. The configuration of the load board 18 depends on the type or family of device or integrated circuit being tested, such as an analog or digital electronic circuit, while the configuration of the fixture board 20 is typically specific to the family or particular device or integrated circuit being tested.
As shown in FIG. 1, the fixture board 20 is in turn interfaced to a device-under-test (DUT) board 22 that comprises inductors, capacitors, and/or other electronic components or circuits mounted to or fabricated on the DUT board for decoupling, filtering, attenuating, or otherwise modifying electrical signals transmitted to and/or received from a device or integrated circuit being tested. Finally, the DUT board 22 is connected to a socket 24 for effecting an electrical connection(s) between the electronic circuit tester 10 and the actual electronic circuit being tested, such as a packaged device or integrated circuit 26.
As also shown in FIG. 1, the test head 12 is mounted to a dolly 28. The test head 12 is preferably mounted by pivotable connections 30 to the dolly 28. The pivotable connections 30 enable the test head 12 to be positioned in an approximately upward facing horizontal position so that the appropriate load board 18 and calibration or fixture board 20 and DUT board 22 with the socket 24 can be mounted to the test head of the electronic circuit tester 10 by an operator. The test head 12 can also be pivoted to any angular position so that the socket 24 can interface with an automated material handler 32, for example, which rapidly feeds each packaged device or integrated circuit 26 to the electronic circuit tester 10 to be tested.
Alternatively, a wafer probe (not shown) can be substituted for the socket 24 mounted to the DUT board 22. The pivotable connections 30 enable the test head 12 to be pivoted to an inverted position to test devices or integrated circuits on a wafer (not shown) at a wafer probing station (not shown).
In order to interface the socket 24 to the automated material handler 32, or a wafer probe (not shown) at a wafer probing station (not shown), a frame 34 is mounted to the test head 12. A jig 36 that mates with the frame 34 is mounted to the automated material handler 32 or wafer probing station (not shown) to align the test head 12 with the handler or station so that the socket 24 or a wafer probe (not shown), respectively, contacts the device or integrated circuit to be tested.
Unfortunately, the test head 12 is typically massive and difficult for the operator to manipulate. Therefore, it is problematic for the operator to align the socket 24 with respect to the automated material handler 32 or a wafer probing station (not shown) so that packaged devices or integrated circuits or devices or integrated circuits on wafer can be tested.
It would therefore be desirable to provide a structure to facilitate alignment of the socket 24 with the automated material handler 32 or facilitate alignment of a wafer probe (not shown) at a wafer probing station (not shown). Such a structure would facilitate setup and improve the repeatability and reliability of contact between the electronic circuit tester 10 and a device or integrated circuit during actual testing.